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Lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOS) is a key device for the power integrated circuit (PIC) and high voltage integrated circuit (HVIC) technologies. In order to break through the limit relation of 2.5 power between breakdown voltage (BV) and specific on-resistance (Ron,sp) for the traditional LDMOS, and improve the driving capability for the PIC by reducing the power consumption, the new SJ-LDMOS with the semi-insulating poly silicon (SIPOS SJ-LDMOS) is proposed in this paper for the first time, to the best of the authors' knowledge. In order to take full advantage of super junction concept, the SIPOS layer is used for SJ-LDMOS to achieve the effect of the complete three-dimensional reduced surface field (3D-RESURF) for the SJ-LDMOS. The substrate assisted depletion is effectively eliminated by the buffer layer under the super junction. The overall performances of the SIPOS SJ-LDMOS are improved by the uniform and high resistance of the SIPOS layer. The surface electric field is modulated to be uniform by the electric field modulation effect due to the SIPOS layer covering the field oxide. The higher BV would be achieved for the more uniform surface electric field because of the increased average lateral electric field. The BV for the unit length of the drift region is improved to 19.4 V/μupm. The SIPOS SJ-LDMOS along the 3D are subjected to the electric field modulation by the SIPOS layer, which achieves the complete 3D-RESURF effect, thus the drift region with the high concentration can be depleted completely to obtain the high BV. Moreover, in the on-state the majority carrier accumulation can be formed in the drift region of the SIPOS SJ-LDMOS due to the SIPOS layer, so that the specific on-resistance decreases further. In virtue of the ISE simulation, by optimizing the SIPOS layer of the proposed SIPOS SJ-LDMOS, the results show that the specific on-resistance of the SIPOS SJ-LDMOS is 20.87 mΩ·cm2 with a breakdown voltage of 388 V, which is less than 31.14 mΩ·cm2 for the N-buffer SJ-LDMOS with a breakdown voltage of 287 V, and far less than 71.82 mΩ·cm2 for the conventional SJ-LDMOS with a breakdown voltage of only 180 V with the same drift length.
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Keywords:
- super junction /
- semi-insulating poly silicon /
- breakdown voltage /
- specific on resistance
[1] Kyungho L, Haeung J, Byunghee C, Joonhee C, Pang Y S, Jinwoo M, Susanna K 2013 Proceedings of the 25th International Power Semiconductor Devices and ICs, Kanazawa, May 26-30, 2013 p163
[2] Chen X B, Wang X, Johnny K O S 2000 IEEE Trans. Electron Devices 47 1280
[3] Deboy G, Marz M, Stengl J P, Strack H, Tihanyi J, Weber H 1998 Proceedings of the IEEE International Electron Devices Meeting, San Francisco, December 6-9, 1998 p683
[4] Chen X B, Johnny K O S 2001 IEEE Trans. Electron Devices 48 344
[5] Sameh G, Khalil N, Salama C A T 2003 IEEE Trans. Electron Devices 50 1385
[6] Appels J A, Collet M G, Hart P A H, Vase H M J 1980 Philips Journal of Research 35 1
[7] Sameh G, Khalil N, Li Z H, Salama C A T 2004 IEEE TRANSACTIONS ON Electron Devices 51 1185
[8] Zhang B, Chen L, Wu T, Li Z J 2005 Proceedings of the 3th International Conference on Communications, Circuits and Systems, Hong Kong, May 27-30, 2005 p1399
[9] Wei J, Luo X R, Shi X L, Tian R C, Zhang B, Li Z J 2014 Proceedings of the 26th International Power Semiconductor Devices and ICs, Waikoloa, Hawaii, June 15-19, 2014 p127
[10] Duan B X, Cao Z, Yuan X N, Yang Y T 2014 Acta Phys. Sin. 63 227302(in Chinese) [段宝兴, 曹震, 袁小宁, 杨银堂 2014 63 227302]
[11] Duan B X, Cao Z, Yuan S, Yuan X N, Yang Y T 2014 Acta Phys. Sin. 63 247301(in Chinese) [段宝兴, 曹震, 袁嵩, 袁小宁, 杨银堂 2014 63 247301]
[12] Duan B X, Yang Y T, Zhang B 2009 IEEE Electron Device Lett. 30 305
[13] Duan B X, Yang Y T, Zhang B, Hong X F 2009 IEEE Electron Device Lett. 30 1329
[14] Duan B X, Yang Y T 2011 IEEE Trans. Electron Devices 58 2057
[15] Duan B X, Zhang B, Li Z J 2005 Solid-State Electronics 49 1965
[16] Duan B X, Yang Y T, Zhang B 2010 Solid-State Electronics 54 685
[17] Matsudai T, Nakagawa A 1992 Proceedings of the 4th International Power Semiconductor Devices and ICs, Toronto, Canada, May 26-28, 1992 p272
[18] Funaki, H,Yamaguchi Y, Hirayama K, Nakagawa A 1998 Proceedings of the 10th International Power Semiconductor Devices and ICs, Digest, Kyoto, June 3-6, 1998 p25
[19] Chung S K, Shin D K 1999 IEEE Trans. Electron Devices 46 1804
[20] Wei D L 2009 Electronics 9 37 [魏敦林 2009 电子与封装 9 37]
[21] Matsushita T, Aoki T, Ohtsu T, Yamoto H, Hayashi H, Okayama M, Kawana Y 1976 IEEE Trans. Electron Devices 23 826
[22] Mimura A, Oohayashi M, Murakami S, Momma N 1985 IEEE Electron Device Letters 6 189
[23] Jaume D, Charitat G, Reynes J M, Rossel P 1991 IEEE Trans. Electron Devices 38 1681
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[1] Kyungho L, Haeung J, Byunghee C, Joonhee C, Pang Y S, Jinwoo M, Susanna K 2013 Proceedings of the 25th International Power Semiconductor Devices and ICs, Kanazawa, May 26-30, 2013 p163
[2] Chen X B, Wang X, Johnny K O S 2000 IEEE Trans. Electron Devices 47 1280
[3] Deboy G, Marz M, Stengl J P, Strack H, Tihanyi J, Weber H 1998 Proceedings of the IEEE International Electron Devices Meeting, San Francisco, December 6-9, 1998 p683
[4] Chen X B, Johnny K O S 2001 IEEE Trans. Electron Devices 48 344
[5] Sameh G, Khalil N, Salama C A T 2003 IEEE Trans. Electron Devices 50 1385
[6] Appels J A, Collet M G, Hart P A H, Vase H M J 1980 Philips Journal of Research 35 1
[7] Sameh G, Khalil N, Li Z H, Salama C A T 2004 IEEE TRANSACTIONS ON Electron Devices 51 1185
[8] Zhang B, Chen L, Wu T, Li Z J 2005 Proceedings of the 3th International Conference on Communications, Circuits and Systems, Hong Kong, May 27-30, 2005 p1399
[9] Wei J, Luo X R, Shi X L, Tian R C, Zhang B, Li Z J 2014 Proceedings of the 26th International Power Semiconductor Devices and ICs, Waikoloa, Hawaii, June 15-19, 2014 p127
[10] Duan B X, Cao Z, Yuan X N, Yang Y T 2014 Acta Phys. Sin. 63 227302(in Chinese) [段宝兴, 曹震, 袁小宁, 杨银堂 2014 63 227302]
[11] Duan B X, Cao Z, Yuan S, Yuan X N, Yang Y T 2014 Acta Phys. Sin. 63 247301(in Chinese) [段宝兴, 曹震, 袁嵩, 袁小宁, 杨银堂 2014 63 247301]
[12] Duan B X, Yang Y T, Zhang B 2009 IEEE Electron Device Lett. 30 305
[13] Duan B X, Yang Y T, Zhang B, Hong X F 2009 IEEE Electron Device Lett. 30 1329
[14] Duan B X, Yang Y T 2011 IEEE Trans. Electron Devices 58 2057
[15] Duan B X, Zhang B, Li Z J 2005 Solid-State Electronics 49 1965
[16] Duan B X, Yang Y T, Zhang B 2010 Solid-State Electronics 54 685
[17] Matsudai T, Nakagawa A 1992 Proceedings of the 4th International Power Semiconductor Devices and ICs, Toronto, Canada, May 26-28, 1992 p272
[18] Funaki, H,Yamaguchi Y, Hirayama K, Nakagawa A 1998 Proceedings of the 10th International Power Semiconductor Devices and ICs, Digest, Kyoto, June 3-6, 1998 p25
[19] Chung S K, Shin D K 1999 IEEE Trans. Electron Devices 46 1804
[20] Wei D L 2009 Electronics 9 37 [魏敦林 2009 电子与封装 9 37]
[21] Matsushita T, Aoki T, Ohtsu T, Yamoto H, Hayashi H, Okayama M, Kawana Y 1976 IEEE Trans. Electron Devices 23 826
[22] Mimura A, Oohayashi M, Murakami S, Momma N 1985 IEEE Electron Device Letters 6 189
[23] Jaume D, Charitat G, Reynes J M, Rossel P 1991 IEEE Trans. Electron Devices 38 1681
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