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Novel lateral double-diffused MOSFET with vertical assisted deplete-substrate layer

Zhao Yi-Han Duan Bao-Xing Yuan Song Lü Jian-Mei Mei Yang

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Novel lateral double-diffused MOSFET with vertical assisted deplete-substrate layer

Zhao Yi-Han, Duan Bao-Xing, Yuan Song, Lü Jian-Mei, Mei Yang
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  • Lateral double-diffused MOSFETs (LDMOS) are widely used in high voltage integrate circuits and smart power integrate circuits because of their lateral channels and their electrodes located on the surface of the device, thereby facilitating integration with other low-voltage circuits and devices, and they have become the core technology of the second electronic revolution. In order to optimize the breakdown characteristics and the performance of the LDMOS, in this paper, a novel LDMOS is proposed with the vertical assisted deplete-substrate layer (ADSL) on the basis of traditional LDMOS structure. The new ADSL layer makes the vertical depletion region below the drain expand to substrate excessively, thus introduces a new electric field peak at the bottom of the ADSL layer by using the electric field modulation effect, so that the vertical electric field is optimized. The ISE simulation results show that when the lengths of the drift region of ADSL LDMOS and traditional LDMOS are both 70 m, the breakdown voltage is increased from 462 V to 897 V, improved by about 94%. Also, the figure-of-merit (FOM) is upgraded from 0.55 MW/cm2 to 1.24 MW/cm2, increased by 125%. Therefore, the new structure ADSL LDMOS has a great improvement in device performance compared with that of the traditional LDMOS. Moreover, authors have studied the ADSL LDMOS from three parts, all of these confirm that the new structure has a great potential application in power device. Firstly, through the lateral surface electric field distributions and vertical electric filed distributions of conventional LDMOS and ADSL LDMOS, a new electric field peak at the bottom of the ADSL is introduced in the vertical direction. Secondly, the mechanism for the new structure can present a deeper understanding through the ADSL LDMOS concentration and structural parameter optimization process. The FOM is optimized when the drift region concentration and ADSL concentration are 1.81015 cm-3 and 6.51015 cm-3, respectively, and it can reach a best value when the ADSL length is 40 m. Thirdly, the ADSL layer is further partitioned and optimized. On the basis of the new structure, the breakdown voltage is increased to 938 V when the new structure is based on the dual partition, and in the triple partition the breakdown voltage reaches 947 V. In this paper, through simulations, the detailed analyses of the proposed new structure of the mechanism and its performance are conducted, and the breaking of the breakdown characteristics of silicon-based devices is of special significance for developing the lateral power devices.
      Corresponding author: Duan Bao-Xing, bxduan@163.com
    • Funds: Project supported by the National Basic Research Program of China (Grant Nos. 2014CB339900, 2015CB351906) and the Key Program of the National Natural Science Foundation of China (Grant Nos. 61234006, 61334002).
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    Yi B, Chen X B 2017 IEEE Trans. Power Electron. 32 551

    [2]

    Wei J, Luo X R, Shi X L, Tian R C, Zhang B, Li Z J 2014 Proceedings of the 26th International Symposium on Power Semiconductor Devices IC's Waikoloa, Hawaii, June 15-19, 2014 p127

    [3]

    He Y D, Zhang G G, Zhang X 2014 Proceedings of the 26th International Symposium on Power Semiconductor Devices IC's Waikoloa, Hawaii, June 15-19, 2014 p171

    [4]

    Duan B X, Zhang B, Li Z J 2007 Chin. Phys. Lett. 24 1342

    [5]

    Duan B X, Cao Z, Yuan S, Yuan X N, Yang Y T 2014 Acta Phys. Sin. 63 247301 (in Chinese)[段宝兴, 曹震, 袁嵩, 袁小宁, 杨银堂 2014 63 247301]

    [6]

    Kamath A, Patil T, Adari R, Bhattacharya I, Ganguly S, Aldhaheri R W, Hussain M A, Saha D 2012 IEEE Electron. Device Lett. 33 1690

    [7]

    Huang T D, Zhu X L, Wong K M, Lau K M 2012 IEEE Electron. Device Lett. 33 212

    [8]

    Zhou C H, Jiang Q M, Huang S, Chen K J 2012 IEEE Electron. Device Lett. 33 1132

    [9]

    Lee J H, Yoo J K, Kang H S, Lee J H 2012 IEEE Electron. Device Lett. 33 1171

    [10]

    Lee H S, Piedra D, Sun M, Gao X, Guo S, Palacios T 2012 IEEE Electron. Device Lett. 33 982

    [11]

    Hao Y, Zhang J F, Zhang J C 2013 Nitride Wide Band Gap Semiconductor Material and Electronic Device (1st Ed.) (Beijing:Science Press) pp1-5(in Chinese)[郝跃, 张金凤, 张进成2013氮化物宽禁带半导体材料与电子器件(第一版) (北京:科学出版社)第15页]

    [12]

    Jha S, Jelenkovic E V, Pejovic M M, Ristic G S, Pejovic M, Tong K Y, Surya C, Bello I, Zhang W J 2009 Microelectron. Eng. 86 37

    [13]

    Arulkumaran S, Liu Z H, Ng G I, Cheong W C, Zeng R, Bu J, Wang H, Radhakrishnan K, Tan C L 2007 Thin Solid Films 515 4517

    [14]

    Appels J A, Vaes H M J 1979 International Electron Devices Meeting Washington, D. C., December 3-5, 1979 p238

    [15]

    Wei J, Luo X R, Ma D, Wu J F, Li Z J, Zhang B 2016 Proceedings of the 28th International Symposium on Power Semiconductor Devices IC's Prague, Czech Republic, June 12-16, 2016 p171

    [16]

    Qiao M, Wang Y R, Zhou X, Jin F, Wang H H, Wang Z, Li Z J, Zhang B 2015 IEEE Electron. Device Lett. 62 2933

    [17]

    Duan B X, Cao Z, Yuan X N, Yuan S, Yang Y T 2015 IEEE Electron. Device Lett. 36 47

    [18]

    Duan B X, Cao Z, Yuan S, Yang Y T 2015 IEEE Electron. Device Lett. 36 1348

    [19]

    Zhang W T, Qiao M, Wu L J, Ye K, Wang Z, Wang Z G, Luo X R, Zhang S, Su W, Zhang B, Li Z J 2013 Proceedings of the 25th International Symposium on Power Semiconductor Devices IC's Kanazawa, Japan, May 26-30, 2013 p329

    [20]

    Luo X R, Li Z J, Zhang B, Fu D P, Zhan Z, Chen K F, Hu S D, Zhang Z Y, Feng Z C, Yan B 2008 IEEE Electron. Device Lett. 29 1395

    [21]

    ISE TCAD Manuals, release 10, Synopsys

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Publishing process
  • Received Date:  22 November 2016
  • Accepted Date:  10 January 2017
  • Published Online:  05 April 2017

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