Demonstration of ultra-thin high-<i>k</i> LaLuO<sub>3</sub> gate dielectric for Ge-CMOS manufacture in More Moore application

TANG Xiaoyu; LIU Yujie; HUA Tao

doi:10.7498/aps.74.20250126

Abstract

Germanium material holds great potential applications in low-power, high-mobility field-effect transistors because of their advantages of high electron and hole mobility, narrow bandgap, and compatibility with silicon CMOS technologies. The development of high-quality gate oxide processes is crucial in fabricating high-mobility Ge-based transistors, especially those with high dielectric constant for superior gate control and preferable gate stability. Rare-earth oxides represented by LaLuO₃ have high dielectric constants and high crystallization temperatures, making them potential candidates for Ge-based metal-oxide-semiconductor field-effect transistor (MOSFET) gate technology. In this work, a germanium (Ge)-based oxide dielectric LaLuO₃ is fabricated utilizing a p-type Ge substrate with a (111) crystal orientation and a doping concentration of 1×10¹⁶ cm^–3, and radio-frequency (RF) co-sputtering 2-inch 99.9% La₂O₃ and Lu₂O₃ targets. Systematical investigations are conducted to evaluate the effects of annealing process conditions on the characteristics of the LaLuO₃/Ge MOS gate structure under three specifically designed annealing atmospheres, i.e. nitrogen, oxygen, and a nitrogen-oxygen mixed gas with an N₂:O₂ ratio of 0.999∶0.001. Meanwhile, the influence of annealing pressure is also explored. The results show that annealing in pure oxygen at atmospheric pressure can reduce the hysteresis of gate capacitance, but it can lead to the formation of interface layers. Correspondingly, annealing technique based on high-pressure and low-oxygen-content (0.1% O₂) atmosphere is developed, which not only improves the LaLuO₃/Ge interface quality and suppresses the oxygen vacancy generation, but also achieves an extremely low equivalent oxide thickness (EOT) of 1.8 nm and a hysteresis voltage of only 40 mV, resulting in an ideal LaLuO₃/Ge MOS structure. This work thus provides a high-performance LaLuO₃/Ge gate process solution for Ge MOSFETs.

Keywords:

Ge-based metal-oxide-semiconductor field-effect transistor /
gate stack process /
rare-earth oxide /
high-k dielectric constant

Authors and contacts

School of Commuciation and Artificial Intelligence, School of Integrated Circuits, Nanjing Institute of Technology, Nanjing 211167, China

Corresponding author: TANG Xiaoyu, xiaoyutang@njit.edu.cn

Funds: Project supported by the National Natural Science Foundation of China (Grant No. 62104102) and the Scientific Research Foundation of Nanjing Institute of Technology, China (Grant No. YKJ201827).

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References

[1]	Del Alamo J A 2011 Nature 479 317 Google Scholar
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Cited By

图 1 Au/LaLuO₃/Ge/Al MOS电容制备工艺流程和器件结构示意图

Figure 1. Fabrication process and device structure of Au/LaLuO₃/Ge/Al MOS capacitor.

DownLoad: Full-Size Img PowerPoint

图 2 共溅射生成的30 nm LaLuO₃薄膜的XPS测试数据与拟合峰

Figure 2. XPS data and fitting peak curves for 30 nm LaLuO₃ film by co-sputtering.

DownLoad: Full-Size Img PowerPoint

图 3 10 nm LaLuO₃/Ge MOS 电容在不同环境下退火的电容-电压曲线(退火温度为600 ℃, 时间是30 s, 测试频率为 1 kHz—1 MHz)　(a)氮气氛围; (b)氧气氛围; (c)低氧含量气体氛围

Figure 3. The C -V curves of 10 nm LaLuO₃/Ge MOS capacitors under different annealing atmosphere: (a) N₂; (b) O₂; (c) N₂+0.1% O₂. The annealing temperature is 600 ℃ and time is 30 s, with frequency changing from 1 kHz to 1 MHz.

DownLoad: Full-Size Img PowerPoint

图 4 不同气体氛围下退火的LaLuO₃/Ge MOS电容在1 MHz测试频率下的(a)电容-电压曲线和(b)迟滞电压

Figure 4. The (a) C -V curves and (b) hysteresis values of LaLuO₃/Ge MOS capacitors under different annealing atmospheres at frequency of 1 MHz

DownLoad: Full-Size Img PowerPoint

图 5 采用两步退火处理后的LaLuO₃/Ge MOS电容的CV曲线, 第1步为600 ℃下氮气退火30 s , 第2步为氧气退火, 温度分别为(a) 500 ℃和(b) 400 ℃

Figure 5. The C -V curves of LaLuO₃/Ge MOS capacitors under two-stage annealing procedure, the first step is annealing in N₂ ambient for 30 s at 600 ℃ and the second step is annealing in O₂ ambient at (a) 500 ℃ and (b) 400 ℃.

DownLoad: Full-Size Img PowerPoint

图 6 4 nm LaLuO₃/Ge MOS 电容在不同环境下退火的电容-电压曲线, 测试频率为 1 MHz

Figure 6. The C -V curves of 4 nm LaLuO₃/Ge MOS capacitors under different annealing atmosphere at measuring frequency of 1 MHz.

DownLoad: Full-Size Img PowerPoint

图 7 不同环境下退火的LaLuO₃/Ge MOS 电容的(a) CET和迟滞, 以及(b)界面态密度D_it计算结果

Figure 7. (a) CET and hysteresis and (b) D_it at Fermi level of LaLuO₃/Ge MOS capacitors under different annealing atmosphere.

DownLoad: Full-Size Img PowerPoint

图 8 采用高压低氧含量(0.1%)气体退火后的4 nm LaLuO₃/Ge MOS的电容-电压曲线

Figure 8. The C -V characteristics of 4 nm LaLuO₃/Ge MOS capacitors under high pressure N₂+0.1%O₂ mixture ambient.

DownLoad: Full-Size Img PowerPoint

DownLoad: Full-Size Img PowerPoint

map

[1]	Del Alamo J A 2011 Nature 479 317 Google Scholar
[2]	赵毅, 李骏康, 郑泽杰 2019 68 167301 Google Scholar Zhao Y, Li J K, Zheng Z J 2019 Acta Phys. Sin. 68 167301 Google Scholar
[3]	Wang S W, Guo H X, Ma T, Lei Z F, Ma W Y, Zhong X L, Zhang H, Lu X J, Li J F, Fang J L, Zeng T X 2024 Acta Phys. Sin. 73 238501 [王颂文, 郭红霞, 马腾, 雷志锋, 马武英, 钟向丽, 张鸿, 卢小杰, 李济芳, 方俊霖, 曾天祥 2024 73 238501]Google Scholar Wang S W, Guo H X, Ma T, Lei Z F, Ma W Y, Zhong X L, Zhang H, Lu X J, Li J F, Fang J L, Zeng T X 2024 Acta Phys. Sin. 73 238501 Google Scholar
[4]	Shao Y J, Zhou J, Xu N, Chen J, Watanabe K, Taniguchi T, Shi Y, Li S L 2023 Chin. Phys. Lett. 40 068501 Google Scholar
[5]	Yan N, Xiong Z R, Qin C B, Li X X 2024 Chin. Phys. Lett. 41 028101 Google Scholar
[6]	王琛, 温盼, 彭聪, 徐萌, 陈龙龙, 李喜峰, 张建华 2023 72 087302 Google Scholar Wang C, Wen P, Peng C, Xu M, Chen L L, Li X F, Zhang J H 2023 Acta Phys. Sin. 72 087302 Google Scholar
[7]	Wu H, Wu W, Si M, Peide D Y 2015 IEEE International Electron Devices Meeting (IEDM) Washington DC USA, December 7−9, 2015 p2.1.1
[8]	Yu B, Chang L, Ahmed S, Wang H, Bell S, Yang C Y, Tabery C, Ho C, Xiang Q, King T J, Bokor J, Hu C, Lin M R, Kyser D 2002 IEEE International Electron Devices Meeting (IEDM) San Francisco, CA, USA, December 8−11, 2002 p10.2.1
[9]	曹磊, 刘红侠 2012 61 247303 Google Scholar Cao L, Liu H 2012 Acta Phys. Sin. 61 247303 Google Scholar
[10]	Kim J H, Kim S, Park B G 2019 IEEE Trans. Elec. Dev. 66 1656 Google Scholar
[11]	陈俊东, 韩伟华, 杨冲, 赵晓松, 郭仰岩, 张晓迪, 杨富华 2020 69 137701 Google Scholar Chen J D, Han W H, Yang C, Zhao X S, Guo Y Y, Zhang X D, Yang F H 2020 Acta Phys. Sin. 69 137701 Google Scholar
[12]	Liu C, Wang X Z, Shen C, Ma L P, Yang X Q, Kong Y, Ma W, Liang Y, Feng S, Wang X Y, Wei Y N, Zhu X, Li B, Li C Z, Dong S C, Zhang L N, Ren W C, Sun D M, Cheng H M 2024 Nature 632 782 Google Scholar
[13]	Wei W J, Lü W F, Han Y, Zhang C Y, Chen D K 2023 Chin. Phys. B 32 097301 Google Scholar
[14]	Takagi S, Zhang R, Suh J, Kim S H, Yokoyama M, Nishi K, Takenaka M 2015 Jpn. J. Appl. Phys. 54 06FA01 Google Scholar
[15]	Kamata Y 2008 Mater. Today 11 30 Google Scholar
[16]	Zhang R, Huang P C, Lin J C, Taoka N, Takenaka M, Takagi S 2013 IEEE Trans. Elec. Dev. 60 927 Google Scholar
[17]	Nakaharai S, Tezuka T, Sugiyama N, Moriyama Y, Takagi S 2003 Appl. Phys. Lett. 83 3516 Google Scholar
[18]	Chen C W, Tzeng J Y, Chung C T, Chien H P, Chien C H, Luo G L 2014 IEEE Trans. Elec. Dev. 61 2656 Google Scholar
[19]	Zhang R, Tang X, Yu X, Li J, Zhao Y 2016 IEEE Elec. Dev. Lett. 37 831 Google Scholar
[20]	Murad S A, Baine P T, McNeill D W, Mitchell S J N, Armstrong B M, Modreanu M, Hughes G, Chellappan R K 2012 Solid-state Electrons. 78 136 Google Scholar
[21]	Lee C H, Nishimura T, Nagashio K, Kita K, Toriumi A 2011 IEEE Trans. Elec. Dev. 58 1295 Google Scholar
[22]	Xie M, Nishimura T, Yajima T, Toriumi A 2020 J. Appl. Phys. 127 024101 Google Scholar
[23]	Wang S K, Kita K, Nishimura T, Nagashio K, Toriumi A 2011 Jpn. J. Appl. Phys. 50 04DA01 Google Scholar
[24]	Ogawa S, Suda T, Yamamoto T, Kutsuki K, Hideshima I, Hosoi T, Shimura T, Watanabe H 2011 Appl. Phys. Lett. 99 142101 Google Scholar
[25]	Roeckerath M, Heeg T, Lopes J M J, Schubert J, Mantl S, Besmehn A, Myllymӓki P, Niinistö L 2008 Thin Solid Films 517 201 Google Scholar
[26]	Goh K H, Haseeb A S M A, Wong Y H 2017 Mater. Sci. Semicon. Proc. 68 302 Google Scholar
[27]	Gu J J, Liu Y Q, Xu M, Celler G K, Gordon R G, Ye P D 2010 Appl. Phys. Lett. 97 012106 Google Scholar
[28]	Özben E D, Lopes J M J, Nichau A, Schnee M, Lenk S, Besmehn A, Bourdelle K K, Zhao Q T, Schubert J, Mantl S 2010 IEEE Elec. Dev. Lett. 32 15 Google Scholar
[29]	Yu W J, Zhang B, Liu C, Xue Z Y, Chen M, Zhao Q T 2014 Chin. Phys. Lett. 31 016101 Google Scholar
[30]	Xiong K, Robertson 2009 Microelectron. Eng. 86 1672 Google Scholar
[31]	Radtke C, Krug C, Soares G V, Baumvol I J R, Lopes J M J, Durgun-Ozben E, Nichau A, Schubert J, Mantl S 2010 Electrochem. Solid-State Lett. 13 G37 Google Scholar
[32]	Tabata T, Lee C H, Kita K, Toriumi A 2008 ECS Trans. 16 479 Google Scholar
[33]	Lee C H, Tabata T, Nishimura T, Nagashio K, Toriumi A 2012 Appl. Phys. Lett. 5 114001 Google Scholar

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Demonstration of ultra-thin high-k LaLuO₃ gate dielectric for Ge-CMOS manufacture in More Moore application

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Corresponding author: TANG Xiaoyu, xiaoyutang@njit.edu.cn

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Demonstration of ultra-thin high-k LaLuO3 gate dielectric for Ge-CMOS manufacture in More Moore application

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Corresponding author: TANG Xiaoyu, xiaoyutang@njit.edu.cn

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Demonstration of ultra-thin high-k LaLuO₃ gate dielectric for Ge-CMOS manufacture in More Moore application