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The semiconductor industry is rapidly developing in the global market, and chip design companies usually purchase the third-party EDA tools in order to shorten the design cycle of IC and reduce manufacturing cost. Therefore, in the IC chip production procedure there exist a lot of insecurity factors, and the hardware security of IC chips becomes the most important issue of the national security defense. Physical hardware trojan will modify the value of register, leak sensitive data and cause device degradation failure. Furthermore, the physical hardware trojans only modify the physical properties of the circuit chip rather than injects the malicious functional circuit. They are hidden more deeply than logical hardware trojans. Therefore, it is far-reaching significance issues for the hardware trojan detection methods and national security to study logic circuit transmission characteristics and the chip degradation failure physical mechanism which are caused by injection physical hardware trojans. In this paper, a metal-oxide-semiconductor field-effect transistor (MOSFET) device with injection dopant hardware trojan is realized by using ATHENA process simulation system to achieve the ion implantation process. The ATLAS simulation devices are tested using hot carrier injection degradation (hot carrier degradation is denoted by HCD) stress model for the degradation failure process which is caused by injecting the hot carrier injection hardware trojan (HCHT) into the MOSFET device. Another normal MOSFET combines with dopant hardware trojan MOSFET or hot carrier injection hardware trojan MOSFET to comprise the same inverter logic circuit by using the ATLAS two-dimensional (2D) device simulation system with SmartSpice instructions mode. The effect on logic circuit output characteristics caused by physical hardware trojan is studied by using Spice simulation to output the DC and AC transient time characteristics. It is also studied how the W/L value of a hardware trojan transistor influences the output characteristics of the logic circuit. We design an experiment to study transient characteristics of the same inverter logic module which consists of different W/L values of a transistor at different temperatures. The experiment is realized by Spice circuit simulation. In this paper, the effects of the variations of the HCD stress intensity and temperature on output characteristic are analyzed for hot carrier injection hardware trojan. The results indicate that the negative effect of hardware trojan on logic circuit DC current output characteristic is more obvious than AC transient time characteristic. Thus, we propose an effective method and a convenient procedure to detect the injection physical hardware trojan in packaged chips. Furthermore, the test process is a feasible operation method of detecting physical hardware trojan.
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Keywords:
- hardware trojan /
- hot carrier injection /
- device degradation /
- failure analysis
[1] Tehranipoor M, Koushanfar F 2010 IEEE Design Test of Computers 27 10
[2] Alkabani Y, Koushanfar F 2009 Proceedings of Computer-Aided Design-Digest of Technical Papers San Jose, CA Nov. 2-5, 2009 p123
[3] Banga M, Hsiao M S 2009 Proceedings of Hardware Oriented Security and Trust Francisco, CA July 27-27, 2009 p104
[4] Koushanfar F, Mirhoseini A 2011 IEEE Trans. Inform. Forensics and Security 6 162
[5] Koushanfar F, Mirhoseini A, Alkabani Y 2010 Proceedings of the Information Hiding Calgary, AB June 28-30, 2010 p17
[6] Koushanfar F, Potkonjak M 2007 Proceedings of Design Automation Conference San Diego, CA June 4-8, 2007 p268
[7] Wei S, Potkonjak M 2011 Proceedings of the Network and System Security Milan Sept. 6-8, 2011 p176
[8] Wei S, Li K, Farina, Koushanfar, Miodrag Potkonjak 2012 Proceedings of Design Automation Conference San Francisco, CA June 3-7, 2012 p90
[9] Becker G T, Regazzoni F, Paar C, Burleson W P 2013 Cryptographic Hardware and Embedded Systems (California: Santa Barbara) pp197-214
[10] Zhang X W, En Y F 2015 The Reliability Evaluation Method of Semiconductor Integrated Circuit (Beijing: Electronic Industry Press) p142 (in Chinese) [章晓文, 恩云飞 2015 半导体集成电路的可靠性及评价方法(北京: 电子工业出版社) 第142页]
[11] Liu H X, Zheng X F, Hao Y 2005 Acta Phys. Sin. 54 1373 (in Chinese) [刘红侠, 郑雪峰, 郝跃 2005 54 1373]
[12] Li Z H, Liu H X, Hao Y 2006 Acta Phys. Sin. 55 820 (in Chinese) [李忠贺, 刘红侠, 郝跃 2006 55 820]
[13] Xu J P, Li C X, Wu H P 2005 Acta Phys. Sin. 54 2918 (in Chinese) [徐静平, 李春霞, 吴海平 2005 54 2918]
[14] Lei X Y, Liu H X, Zhang K, Zhang Y, Zheng X F, Ma X H, Hao Y 2013 Chin. Phys. B 22 047304
[15] Donald A N(translated by Xie S) 2015 An Introduction to Semiconductor Devices (Beijing: Electronic Industry Press) pp224-245 (in Chinese) [唐纳德 A N 著(谢生 译) 2015 半导体导论 (北京: 电子工业出版社) 第224-245页]
[16] Austin T, Blaauw D, Mudge T, Flautner K 2004 Computer 37 57
[17] Ahmad I, Kornain Z, Idros M F M 2006 Proceedings of Optoelectronic and Microelectronic Materials and Devices Perth, WA Dec. 6-8, 2006 p298
[18] Sato T, Kunitake Y 2007 Proceedings of the Quality Electronic Design San Jose, CA March 26-28, 2007 p539
[19] Agarwal M, Paul B C, Zhang M, Mitra S 2007 Proceedings of the VLSI Test Symmposium Berkeley, CA May 6-10, 2007 p277
[20] Quader K, Ko P, Hu C, Fang P, Yue J 1992 Proceedings of the Reliability Physics Symposium San Diego, CA March 31-April 2, 1992 p16
[21] Zhang J, Chu S F S 2002 IEEE Trans. Electron. Dev. 49 1672
[22] Zhang X H, Tehranipoor M 2011 Proceedings of the Design, Automation { Test in Europe Conference Exhibition Grenoble March 14-18, 2011 p1
[23] Shiyanovskii Y, Wolff F, Rajendran A, Papachristou C, Weyer D, Clay W 2010 Proceedings of the Adaptive Hardware and System Anaheim June 15-18, 2010 p215
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[1] Tehranipoor M, Koushanfar F 2010 IEEE Design Test of Computers 27 10
[2] Alkabani Y, Koushanfar F 2009 Proceedings of Computer-Aided Design-Digest of Technical Papers San Jose, CA Nov. 2-5, 2009 p123
[3] Banga M, Hsiao M S 2009 Proceedings of Hardware Oriented Security and Trust Francisco, CA July 27-27, 2009 p104
[4] Koushanfar F, Mirhoseini A 2011 IEEE Trans. Inform. Forensics and Security 6 162
[5] Koushanfar F, Mirhoseini A, Alkabani Y 2010 Proceedings of the Information Hiding Calgary, AB June 28-30, 2010 p17
[6] Koushanfar F, Potkonjak M 2007 Proceedings of Design Automation Conference San Diego, CA June 4-8, 2007 p268
[7] Wei S, Potkonjak M 2011 Proceedings of the Network and System Security Milan Sept. 6-8, 2011 p176
[8] Wei S, Li K, Farina, Koushanfar, Miodrag Potkonjak 2012 Proceedings of Design Automation Conference San Francisco, CA June 3-7, 2012 p90
[9] Becker G T, Regazzoni F, Paar C, Burleson W P 2013 Cryptographic Hardware and Embedded Systems (California: Santa Barbara) pp197-214
[10] Zhang X W, En Y F 2015 The Reliability Evaluation Method of Semiconductor Integrated Circuit (Beijing: Electronic Industry Press) p142 (in Chinese) [章晓文, 恩云飞 2015 半导体集成电路的可靠性及评价方法(北京: 电子工业出版社) 第142页]
[11] Liu H X, Zheng X F, Hao Y 2005 Acta Phys. Sin. 54 1373 (in Chinese) [刘红侠, 郑雪峰, 郝跃 2005 54 1373]
[12] Li Z H, Liu H X, Hao Y 2006 Acta Phys. Sin. 55 820 (in Chinese) [李忠贺, 刘红侠, 郝跃 2006 55 820]
[13] Xu J P, Li C X, Wu H P 2005 Acta Phys. Sin. 54 2918 (in Chinese) [徐静平, 李春霞, 吴海平 2005 54 2918]
[14] Lei X Y, Liu H X, Zhang K, Zhang Y, Zheng X F, Ma X H, Hao Y 2013 Chin. Phys. B 22 047304
[15] Donald A N(translated by Xie S) 2015 An Introduction to Semiconductor Devices (Beijing: Electronic Industry Press) pp224-245 (in Chinese) [唐纳德 A N 著(谢生 译) 2015 半导体导论 (北京: 电子工业出版社) 第224-245页]
[16] Austin T, Blaauw D, Mudge T, Flautner K 2004 Computer 37 57
[17] Ahmad I, Kornain Z, Idros M F M 2006 Proceedings of Optoelectronic and Microelectronic Materials and Devices Perth, WA Dec. 6-8, 2006 p298
[18] Sato T, Kunitake Y 2007 Proceedings of the Quality Electronic Design San Jose, CA March 26-28, 2007 p539
[19] Agarwal M, Paul B C, Zhang M, Mitra S 2007 Proceedings of the VLSI Test Symmposium Berkeley, CA May 6-10, 2007 p277
[20] Quader K, Ko P, Hu C, Fang P, Yue J 1992 Proceedings of the Reliability Physics Symposium San Diego, CA March 31-April 2, 1992 p16
[21] Zhang J, Chu S F S 2002 IEEE Trans. Electron. Dev. 49 1672
[22] Zhang X H, Tehranipoor M 2011 Proceedings of the Design, Automation { Test in Europe Conference Exhibition Grenoble March 14-18, 2011 p1
[23] Shiyanovskii Y, Wolff F, Rajendran A, Papachristou C, Weyer D, Clay W 2010 Proceedings of the Adaptive Hardware and System Anaheim June 15-18, 2010 p215
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