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文章研究了SOI衬底上SiGe npn异质结晶体管集电结耗尽电荷和电容.根据器件实际工作情况,基于课题组前面的工作,对耗尽电荷和电容模型进行扩展和优化.研究结果表明,耗尽电荷模型具有更好的光滑性;耗尽电容模型为纵向耗尽与横向耗尽电容的串联,考虑了不同电流流动面积,与常规器件相比,SOI器件全耗尽工作模式下表现出更小的集电结耗尽电容,因此更大的正向Early电压;在纵向工作模式到横向工作模式转变的电压偏置点,耗尽电荷和电容的变化趋势发生改变.SOI薄膜上纵向SiGe HBT集电结耗尽电荷和电容模型的建立和扩展为毫米波SOI BiCMOS工艺中双极器件核心参数如Early电压、特征频率等的设计提供了有价值的参考.The SiGe heterojunction bipolar transistor (HBT) on thin film SOI is successfully integrated with SOI CMOS by folded collector. This paper deals with the collector depletion charge and the capacitance of this structure. An optimized model is presented based on our previous research. The results show that the charge model is smoother, and that the capacitance model with considering different current flow areas, is vertical and horizontal depletion capacitances in series, showing that the depletion capacitance is smaller than that of a bulk HBT. The charge and capacitance vary with the increase of reverse collector-base bias. This collector depletion charge and capacitance model provides valuable reference to the SOI SiGe HBT electrical parameters design and simulation such as Early voltage and transit frequency in the latest 0.13 m SOI BiCMOS technology.
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Keywords:
- depletion capacitance /
- SiGe HBT /
- SOI
[1] Fleetwood D M, Thome F V, Tsao S S, Dressendorfer P V, Dandini V J, Schwank J R 1988 IEEE Trans. Nucl. Sci. 35 1099
[2] [3] Cai J, Ajmera A, Ouyang C, Oldiges P, Steigerwalt M, Stein K, Jenkins K, Shahidi G, Ning T 2002 Symposium on VLSI Technology Digest of Technical Papers Honolulu, HI, United States, June 11-13, p172
[4] [5] Ouyang Q C, Cai J, Ning T, Oldiges P, Johnson J B 2002 Proc. IEEE Bipolar/BiCMOS Circuits and Technol. Meeting BCTM Piscataway, NJ, United States Sep. 29-Oct. 1, p28
[6] Cai J, Kumar M, Steigerwalt M, Ho H, Schonenberg K, Stein K, Chen H J, Jenkins K, Ouyang Q C, Oldiges P, Ning T 2003 Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM Toulouse, France, Sep. 28-30, p215
[7] [8] [9] Cai J, Ning T H 2004 Proc. 7th International Conference on Solid-State and Integrated Circuits Technology ICSICT Beijing, China, Oct. 18-21, p2102
[10] Avenier G, Chevalier P, Vandelle B, Lenoble D, Saguin F, Fregonese S, Zimmer T, Chantre A 2005 Proc. of ESSDERC 2005: 35th European Solid-State Device Research Conference Grenoble, France, Sep. 12-16, p133
[11] [12] [13] Bellini M, Cressler J D, Cai J 2007 Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM Boston, MA, USA, Sep. 30-Oct. 2, p234
[14] [15] Avenier G, Diop M, Chevalier P, Troillard G, Loubet N, Bouvier J, Depoyan Linda, Derrier N, Buczko M, Leyris C, Boret S, Montusclat S, Margain A, Pruvost S, Nicolson S T, Yau K H K, Revil N, Gloria D, Dutartre D, Voinigescu S P, Chantre A 2009 IEEE Journal of Solid-State Circuits 44 2312
[16] Avenier G, Fregonese S, Chevalier P, Bustos J, Saguin F, Schwartzmann T, Maneux C, Zimmer T, Chantre A 2008 IEEE Transactions on Electron Devices 55 585
[17] [18] [19] Xu X B, Zhang H M, Hu H Y, Xu L J, Ma J L 2011 Acta Phys. Sin. 60 078502 (in Chinese)[徐小波、张鹤鸣、胡辉勇、许立军、马建立 2011 60 078502]
[20] [21] Xu X B, Zhang H M, Hu H Y, Ma J L, Xu L J 2011 Chin. Phys. B 20 018502
[22] [23] Fregonese S, Avenier G, Maneux C, Chantre A 2006 IEEE Transactions on Electron Devices 53 296
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[1] Fleetwood D M, Thome F V, Tsao S S, Dressendorfer P V, Dandini V J, Schwank J R 1988 IEEE Trans. Nucl. Sci. 35 1099
[2] [3] Cai J, Ajmera A, Ouyang C, Oldiges P, Steigerwalt M, Stein K, Jenkins K, Shahidi G, Ning T 2002 Symposium on VLSI Technology Digest of Technical Papers Honolulu, HI, United States, June 11-13, p172
[4] [5] Ouyang Q C, Cai J, Ning T, Oldiges P, Johnson J B 2002 Proc. IEEE Bipolar/BiCMOS Circuits and Technol. Meeting BCTM Piscataway, NJ, United States Sep. 29-Oct. 1, p28
[6] Cai J, Kumar M, Steigerwalt M, Ho H, Schonenberg K, Stein K, Chen H J, Jenkins K, Ouyang Q C, Oldiges P, Ning T 2003 Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM Toulouse, France, Sep. 28-30, p215
[7] [8] [9] Cai J, Ning T H 2004 Proc. 7th International Conference on Solid-State and Integrated Circuits Technology ICSICT Beijing, China, Oct. 18-21, p2102
[10] Avenier G, Chevalier P, Vandelle B, Lenoble D, Saguin F, Fregonese S, Zimmer T, Chantre A 2005 Proc. of ESSDERC 2005: 35th European Solid-State Device Research Conference Grenoble, France, Sep. 12-16, p133
[11] [12] [13] Bellini M, Cressler J D, Cai J 2007 Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM Boston, MA, USA, Sep. 30-Oct. 2, p234
[14] [15] Avenier G, Diop M, Chevalier P, Troillard G, Loubet N, Bouvier J, Depoyan Linda, Derrier N, Buczko M, Leyris C, Boret S, Montusclat S, Margain A, Pruvost S, Nicolson S T, Yau K H K, Revil N, Gloria D, Dutartre D, Voinigescu S P, Chantre A 2009 IEEE Journal of Solid-State Circuits 44 2312
[16] Avenier G, Fregonese S, Chevalier P, Bustos J, Saguin F, Schwartzmann T, Maneux C, Zimmer T, Chantre A 2008 IEEE Transactions on Electron Devices 55 585
[17] [18] [19] Xu X B, Zhang H M, Hu H Y, Xu L J, Ma J L 2011 Acta Phys. Sin. 60 078502 (in Chinese)[徐小波、张鹤鸣、胡辉勇、许立军、马建立 2011 60 078502]
[20] [21] Xu X B, Zhang H M, Hu H Y, Ma J L, Xu L J 2011 Chin. Phys. B 20 018502
[22] [23] Fregonese S, Avenier G, Maneux C, Chantre A 2006 IEEE Transactions on Electron Devices 53 296
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