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超导量子处理器芯片工艺线中金属污染问题的研究

徐晓 张海斌 宿非凡 严凯 荣皓 邓辉 杨新迎 马效腾 董学 王绮名 刘佳林 李满满

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超导量子处理器芯片工艺线中金属污染问题的研究

徐晓, 张海斌, 宿非凡, 严凯, 荣皓, 邓辉, 杨新迎, 马效腾, 董学, 王绮名, 刘佳林, 李满满

Metal contamination in process line of superconducting quantum processor chips

XU Xiao, ZHANG Haibin, SU Feifan, YAN Kai, RONG Hao, DENG Hui, YANG Xinying, MA Xiaoteng, DONG Xue, WANG Qiming, LIU Jialin, LI Manman
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  • 超导量子处理器芯片的制造工艺面临特殊的金属污染挑战, 其材料体系和工艺特性与传统半导体芯片存在显著差异. 本研究系统分析了量子芯片中金属污染的来源、扩散机制及防控策略, 重点探讨了超导材料(如Ta, Nb, Al, TiN等)在蓝宝石和硅衬底上的体扩散与表面迁移行为. 研究发现, 蓝宝石衬底因其致密晶格结构表现出优异的抗扩散性能, 而硅衬底需重点关注Au, In, Sn等易迁移金属的污染风险. 通过实验验证, Ti/Au结构的凸点下金属化层在硅衬底上易发生Au穿透扩散, 且增加Ti层厚度无法显著改善阻挡效果. 量子芯片的低温工艺(<250 ℃)和超低温工作环境(mK级)有效抑制了金属扩散, 但暴露的金属表面和材料多样性仍带来独特挑战. 研究建议建立量子芯片专属的金属污染防控体系, 并提出了后续在新型材料评估、表面态调控及长期可靠性研究等方向的发展路径. 本文为超导量子芯片的工艺优化和性能提升提供了重要理论支撑和技术指导.
    The manufacturing process of superconducting quantum processor chips faces special challenges of metal contamination, and their material system and process characteristics are significantly different from those of traditional semiconductor chips. This study focuses on the issue of metal contamination in the fabrication process of quantum chips, systematically analyzing the sources, diffusion mechanisms, and prevention strategies of metal contamination in quantum chips, where the bulk diffusion and surface migration behaviors of superconducting materials (such as Ta, Nb, Al, TiN) on sapphire and silicon substrates are particularly emphasized, aiming to provide theoretical basis and technical references for process optimization and to promote the industrialization process of quantum computing technology.The metal contamination in the fabrication of quantum chips is mainly caused by the metal film materials used in the process, the external environment, or the unintended metal impurity atoms introduced in the manufacturing process. Among them, some quantum chip components directly use superconducting metal materials. Unlike semiconductor chips, they cannot achieve front and back stage isolation, resulting in the continuous presence of metal surface migration channels, and the exposed metal structures on the chip surface. Metal contamination often leads to two basic failure problems: short circuits and leakage currents. These problems mainly result from the bulk diffusion of metal impurities in the dielectric layer and the migration behavior on the sample surface. The diffusion and migration rates of metals are affected by temperature, interface reactions, defects, and grain boundaries. The results show that the sapphire substrate, due to its dense lattice structure, exhibits excellent anti-diffusion performance, reducing the risk of contamination and providing a stable interface environment for superconducting quantum chips. For silicon substrates, special attention must be paid to the contamination risks from high-mobility metals such as Au, In, and Sn. Experimental verification shows that Ti/Au under bump metallization structures on silicon substrates are prone to Au penetration diffusion, and increasing Ti thickness does not significantly improve the blocking effect. The low-temperature process (< 250 ℃) and ultra-low-temperature operating environment (mK level) of quantum chips effectively suppress metal diffusion, but the exposed metal surfaces and material diversity still pose unique challenges.The study recommends establishing a dedicated metal contamination prevention system for quantum chips and proposes future research directions, including the evaluations of novel materials, surface state regulation, and long-term reliability studies. This work provides important theoretical support and technical guidance for optimizing the process and enhancing the performance of superconducting quantum chips.
  • 图 1  半导体芯片TaN/TiN等金属扩散阻挡层和硅化物NiSi接触层示意图[7]

    Fig. 1.  Schematic diagram of TaN/TiN diffusion barrier layers and NiSi contact layer in semiconductor chips[7].

    图 2  用于量子芯片的CPW传输线及其地线互连的铝质跨接桥结构

    Fig. 2.  Aluminum crossover bridge structure for CPW transmission line and ground interconnects in quantum chips.

    图 3  梳状电极UBM结构的线间电阻测试示意图

    Fig. 3.  Schematic of interline resistance test structure for comb-shaped UBM electrodes.

    图 4  高温处理(245 ℃/5 min)前后UBM线间电阻变化对比

    Fig. 4.  Comparison of UBM interline resistance before and after thermal treatment (245 ℃/5 min).

    表 1  半导体芯片与超导量子芯片的工艺比较

    Table 1.  Comparison of process characteristics between conventional semiconductor chips and superconducting quantum chips.

    半导体芯片 超导量子芯片
    器件CMOS场效应晶体管等约瑟夫森结的Transmon结构等
    材料衬底Si, InP, SiC等蓝宝石、高阻Si等
    前道工艺半导体掺杂等超导金属、少量介质材料等
    工艺离子注入、热工艺等有机清洗工艺、剥离工艺等
    环境温度–40—150 ℃毫开尔文(mK)级低温
    湿度常规环境30%—70% RH或更宽泛真空环境
    电磁常规环境
    (除空间应用等特殊场景外)
    电磁屏蔽
    下载: 导出CSV

    表 2  体扩散与表面迁移的特性对比[18]

    Table 2.  Comparison of physical characteristics between metal bulk diffusion and surface migration[18].

    特性体扩散表面迁移
    激活能较高(1—5 eV)较低(0.1—2.0 eV)
    温度依赖性较敏感更敏感(指数关系)
    主导机制空位、间隙跳跃、交换
    典型速率较慢更快(Ds≫Dbulk)
    下载: 导出CSV
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  • 收稿日期:  2025-08-15
  • 修回日期:  2025-09-17
  • 上网日期:  2025-12-13

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