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A new method of realizing a discrete chaotic system using the hybrid architecture of single-electron transistor (SET) and metal oxide semiconductor (MOS) is proposed in this paper. The transfer characteristic for two parallel SETs with a biased current source is investigated and the corresponding S-shape piecewise linear function model is established. Based on this model a one-dimensional discrete mapping system is first constructed, and the dynamics of the system is then analyzed through one-dimensional mapping process bifurcation diagram and Lyapunov exponents, and the corresponding discrete chaotic system is finally designed through the electronic circuit of SET-MOS hybrid architecture. All these indicate that our approach not only is feasible but also has some advantages such as simple circuit structure and good integration compared with existing methods.
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Keywords:
- discrete mapping /
- Lyapunov exponent /
- bifurcation /
- circuit realization
[1] Di G H, Xu Y, Xu W, Gu R C 2011 Acta Phys. Sin. 60 020504 (in Chinese) [狄根虎、许 勇、徐 伟、顾仁财 2011 60 020504]
[2] Liu Z, Zhu X H, Hu W, Jiang F 2007 Int. J. Bifur. Chaos 17 1735
[3] Long M, Qiu S S 2007 Chin. Phys. 16 2254
[4] Zheng F, Tian X J, Li X Y, Wu B 2008 Chin. Phys. B 17 1685
[5] Pan Y, Billings S A 2008 Int. J. Bifur. Chaos 18 997
[6] May R M 1976 Nature 261 459
[7] Henon M 1976 Commun. Math. Phys. 50 69
[8] Juncu V D, Rafiei-Naeini M, Dudek P 2006 Analog Integrated Circuits and Signal Processing 46 275
[9] Wang X Y, Wang M J 2008 Acta Phys. Sin. 57 0731 (in Chinese) [王兴元、王明军 2008 57 0731]
[10] Rodriguez-Vazquez A, Huertas J L, Rueda A, Perez-Verdu B, Chua L O 1987 Proc. IEEE 75 1090
[11] Tanaka H, Sato S, Nakajima K 2000 Analog. Integrated Circ. Sign. Processing 25 329
[12] Chen J F, Cheng L, Liu Y, Peng J H 2003 Acta Phys. Sin. 52 18(in Chinese) [陈菊芳、程 丽、刘 颖、彭建华 2003 52 18]
[13] Herrena R, Horio Y, Suyama K 1997 Proc. IEEE Int. Symp. Nonlinear Theo. Appl. Honolulu, USA November 29-December 2, 1997 p625
[14] Mandal S, Banerjee S 2004 IEEE Trans. Circuits Syst. Regul. Pap. 51 1708
[15] Goossens M 1998 Ph. D. Dissertation (Delft: Delft University)
[16] Delgado-Restituto M, Rodríguez-Vázquez A 2002 Proc. IEEE 90 747
[17] Aihara K, Takabe T, Toyoda M 1990 Phys. Lett. A 144 334
[18] Degawa K, Aoki T, Higuchi T, Inokawa H, Takahashi Y 2004 IECE Trans. Electron. E87-C 1827
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[1] Di G H, Xu Y, Xu W, Gu R C 2011 Acta Phys. Sin. 60 020504 (in Chinese) [狄根虎、许 勇、徐 伟、顾仁财 2011 60 020504]
[2] Liu Z, Zhu X H, Hu W, Jiang F 2007 Int. J. Bifur. Chaos 17 1735
[3] Long M, Qiu S S 2007 Chin. Phys. 16 2254
[4] Zheng F, Tian X J, Li X Y, Wu B 2008 Chin. Phys. B 17 1685
[5] Pan Y, Billings S A 2008 Int. J. Bifur. Chaos 18 997
[6] May R M 1976 Nature 261 459
[7] Henon M 1976 Commun. Math. Phys. 50 69
[8] Juncu V D, Rafiei-Naeini M, Dudek P 2006 Analog Integrated Circuits and Signal Processing 46 275
[9] Wang X Y, Wang M J 2008 Acta Phys. Sin. 57 0731 (in Chinese) [王兴元、王明军 2008 57 0731]
[10] Rodriguez-Vazquez A, Huertas J L, Rueda A, Perez-Verdu B, Chua L O 1987 Proc. IEEE 75 1090
[11] Tanaka H, Sato S, Nakajima K 2000 Analog. Integrated Circ. Sign. Processing 25 329
[12] Chen J F, Cheng L, Liu Y, Peng J H 2003 Acta Phys. Sin. 52 18(in Chinese) [陈菊芳、程 丽、刘 颖、彭建华 2003 52 18]
[13] Herrena R, Horio Y, Suyama K 1997 Proc. IEEE Int. Symp. Nonlinear Theo. Appl. Honolulu, USA November 29-December 2, 1997 p625
[14] Mandal S, Banerjee S 2004 IEEE Trans. Circuits Syst. Regul. Pap. 51 1708
[15] Goossens M 1998 Ph. D. Dissertation (Delft: Delft University)
[16] Delgado-Restituto M, Rodríguez-Vázquez A 2002 Proc. IEEE 90 747
[17] Aihara K, Takabe T, Toyoda M 1990 Phys. Lett. A 144 334
[18] Degawa K, Aoki T, Higuchi T, Inokawa H, Takahashi Y 2004 IECE Trans. Electron. E87-C 1827
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