Small size metal-oxide-semiconductor field effect transistor (MOSFET), owing to their high theoretical efficiency and low production cost, have received much attention and are at the frontier of transistors. At present, their development is bottlenecked by physical limits due to equal scaling down of devices, which requires further improvement in terms of materials choice and device fabrication. As the MOSFET devices scale down to nanometer scale, on the one hand, the resulting short channel effect affects severely the thermal noise property; on the other hand, it makes the ratio of thermal noise in the gate, source, drain and substrate regions become higher and higher. However, the traditional thermal noise model mainly considers thermal noise of large-size devices, and its model does not consider the channel saturation region. In view of this, it is necessary to establish a small size MOSFET thermal noise model and analyze its characteristics.

At present, there are some researches on MOSFET thermal noise, but they mainly focus on the thermal noise in channel region of large size nanoscale MOSFET. In the present work, according to the device structure and inherent thermal noise characteristics, we establish a thermal noise model for MOSFETs of 10 nm feature size. The model includes contributions of substrate region, gate-source-drain region, and channel region. In the channel region is also included the thermal noise related to the device saturation regime. Using such a model, the dependence of channel thermal noise and total thermal noise on the device bias condition and device parameters are investigated, evidencing the existence of thermal noise in the device saturation regime, which are consistent with the experimental results in the literature. The thermal noise increases with the gate voltage and source-drain voltage rising as the device structure shrinks. In a temperature range of 100–400 K, the thermal noise is basically on the order of 10²¹, indicating that the temperature has a great influence on the thermal noise. The thermal noise model established in this work can be applied to analyzing the noise performances of small size MOSFET devices, and the conclusions drawn from the present study are beneficial to improving the efficiency, lifetime, and response speed of MOSFETs on a nanometer scale.